Learn the AMBA AXI4 protocol through published lessons on architecture, signals, handshaking, burst transactions, transfer attributes and interconnect behaviour. The course also covers Verilog RTL design, verification components, coverage, assertions, test cases and the differences between AXI3 and AXI4.
One-time course purchase
₹10000 20% off
Base course price: ₹7999 INR
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Refund policy
Included: Access to this course’s published lessons for the period shown above.
Live sessions, reviewed assignments and online labs are available only where explicitly included or assigned.