Courses
Buy now
Deep-dive into USB 3.x SuperSpeed protocol from USB 3.0 to USB 3.2 Gen2x2. Covers LFPS, link training, USB 3.x packet structure, power management (U0-U3 states), USB-C integration, and dual-role power delivery with UVM VIP verification.
0 Lessons
Hours
Buy now
Learn USB 2.0 protocol architecture for SoC integration and verification. Covers USB host/device/OTG architecture, full-speed/high-speed specs, enumeration sequence, USB packet types, USB controller design, ULPI PHY interface, and DV methodology using UVM USB VIP.
0 Lessons
Hours
Buy now
Master LPDDR5 and LPDDR5X for mobile and IoT SoC designs. Covers WCK architecture, link-ECC, deep power down modes, DVFSC, and differences from DDR5. Critical for engineers designing memory subsystems in smartphone, automotive, and wearable SoC applications.
0 Lessons
Hours
Buy now
Advance to DDR5 – the latest DRAM standard with doubled bandwidth and on-die ECC. Covers DDR5 channel architecture, decision feedback equalisation (DFE), on-die ECC, DDR5 PMIC integration, CA parity, and DDR5 controller/PHY design considerations.
0 Lessons
Hours
Buy now
Learn DDR DRAM protocol from fundamentals to controller implementation. Covers DDR4 command/address bus, timing parameters (tCL, tRCD, tRP), read/write burst flows, power states, auto-refresh, and DDR PHY interface with UVM DDR VIP verification.
0 Lessons
Hours
Buy now
Learn AMBA ACE (AXI Coherency Extensions) for cache-coherent multi-processor SoCs. Covers snoop channels, barrier transactions, domain types, ACE-Lite for IO coherency, and integration with ARM CoreLink CCI and CCN interconnects.
0 Lessons
Hours
Buy now
Understand the AMBA CHI (Coherent Hub Interface) protocol for multi-core SoC cache coherency. Covers CHI network layers, transaction types (read, write, snoop), CHI-B and CHI-E specifications, QoS, and integration with ARM CoreLink interconnects.
0 Lessons
Hours
Buy now
Learn the AMBA APB protocol for low-power SoC peripherals. Covers APB2 and APB3 transaction flows, PPROT security extensions, PSTRB byte strobes, APB bridge design, and peripheral register map implementation.
0 Lessons
Hours
Buy now
Master the AMBA AHB (Advanced High-performance Bus) protocol for SoC design. Covers AHB master/slave/arbiter architecture, transfer types, burst transactions, AHB-Lite simplification, and pipeline transfers used widely in microcontrollers and embedded SoCs.
0 Lessons
Hours